SN74ACT2G101PWRQ1

Texas Instruments
595-N74ACT2G101PWRQ1
SN74ACT2G101PWRQ1

Mfr.:

Description:
Flip Flops Automotive 2-ch 2V- to-6V multi-function

Lifecycle:
New Product:
New from this manufacturer.
Datasheet:
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Learn more about Texas Instruments SN74ACT2G101PWRQ1

Availability

Stock:
0

You can still purchase this product for backorder.

On Order:
3,000
Expected 2026-06-01
Factory Lead-Time:
18
Weeks Estimated factory production time for quantities greater than shown.
Quantities greater than 3000 will be subject to minimum order requirements.
Minimum: 1   Multiples: 1
Unit Price:
$-.--
Ext. Price:
$-.--
Est. Tariff:
Packaging:
Full Reel (Order in multiples of 3000)

Pricing (CAD)

Qty. Unit Price
Ext. Price
Cut Tape / MouseReel™ †
$0.992 $0.99
$0.705 $7.05
$0.632 $15.80
$0.553 $55.30
$0.515 $128.75
$0.491 $245.50
$0.45 $450.00
Full Reel (Order in multiples of 3000)
$0.437 $1,311.00
$0.431 $2,586.00
† $8.50 MouseReel™ fee will be added and calculated in your shopping cart. All MouseReel™ orders are non-cancellable and non-returnable. ↩

Product Attribute Attribute Value Select Attribute
Texas Instruments
Product Category: Flip Flops
RoHS:  
D-Type Rising Edge Flip Flop
74ACT
Non-Inverted
TSSOP-16
Schmitt-Trigger
10.5 ns
- 24 mA
24 mA
4.5 V
5.5 V
SMD/SMT
- 40 C
+ 125 C
Reel
Cut Tape
MouseReel
Brand: Texas Instruments
Maximum Clock Frequency: 120 MHz
Number of Input Lines: 8 Input
Number of Output Lines: 2 Output
Product Type: Flip Flops
Series: SN74ACT2G101-Q1
Factory Pack Quantity: 3000
Subcategory: Logic ICs
Triggering Type: Positive Edge
Unit Weight: 67 mg
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Attributes selected: 0

Datasheet

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USHTS:
8542390090
TARIC:
8542319000
ECCN:
EAR99

SN74ACT2G101/Q1 Dual Configurable Data Flip-Flops

Texas Instruments SN74ACT2G101/Q1 Dual Configurable Data Flip-Flops feature a rising-edge-triggered configurable logic clock, active-low clear, and data inputs. The clock inputs can be configured for several 1- and 2-input logic functions, including buffer, inverter, AND, OR, NAND, NOR, XOR, and XNOR. All inputs use a Schmitt trigger architecture to support slow or noisy input signals.

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